Projects
From THz antenna prototyping and silicon photonics to superconducting qubits, analog IC design, and VLSI verification.
Ongoing research
Wafer cleaning/handling, thermal oxidation, diffusion, mask/maskless lithography, etching, and sputtering; 2D-material transfer by mechanical exfoliation; fabricated working MOSFETs and gold antenna patterns on Si/SiO2 with graphene feed-point integration.
Quantum
Transmon–cavity designs in Qiskit Metal sweeping pad dimensions and coupling capacitance; dispersive shift χ via LOM and pyEPR; pointer-state separation under homodyne detection in QuTiP. Output: open-source tool mapping geometry to readout fidelity bounds.
Schematic and layout of a transmon qubit with coupled readout resonator in Keysight ADS QuantumPro; resonator lengths tuned by parametric sweeps; energy-participation-ratio analysis to extract anharmonicity and cross-Kerr coupling.
Python GUI generating parameterized log-periodic antenna geometries from seven inputs, with direct GDSII output verified in KLayout — replacing manual AutoCAD drafting.
Python I–V characterization via Keithley 2401 SMU with Ge photodetector readout; HRS750 spectrometer control; TCP/IP piezo nanopositioner control inside a closed-cycle cryostat (300 K → 4 K); measurement PCBs in Altium Designer and KiCad.
Photonics & analog
56 Gb/s Ge EAM re-architected to Ge-on-Si in Lumerical CHARGE — recessed p-i-n, graded doping, calibrated junction field; custom Franz–Keldysh model and LSF pipeline mapping fields to complex index for MODE (−4–0 V).
Lateral pn phase shifter with Δneff, loss, and VπL benchmarked against a peer-reviewed device (0–7 V); fixed a CHARGE-to-MODE gap via carrier-density index perturbation; tuned MZI FSR to within 2%.
III-V/Si supermode cross-section optimized to a 440 nm Si core (neff = 2.405, MQW Γ = 16.2%); InGaAsP/InP p-i-n in CHARGE (27 kV/cm at −5 V) with ~6,200 cm⁻¹ TE absorption at 1.52 μm via MQW k·p and QCSE red-shift.
Single- and three-ring add-drop filters with S-parameter resonance and thermal-sensitivity analysis; fabrication-ready GDS generated from schematic in Keysight Photonic Designer.
Switching thresholds, hysteresis, and propagation delay via DC/transient analysis; verified across 5 process corners, 3 temperatures (−40°C to 125°C), and 9 supply combinations.
5.5 GHz inductively degenerated LNA designed in Cadence Virtuoso on TSMC 65 nm — noise figure 1.49 dB with 28 dB gain.
Digital
Complete RTL-to-GDSII implementation in Yosys/OpenSTA/OpenROAD on Nangate45 — synthesis, static timing analysis, floorplanning, PDN, place-and-route, and SDC constraints.
Dual-clock FIFO with Gray-code pointer synchronization and multi-flop synchronizers; full/empty flag generation and metastability handling across independent read/write clock domains.
Packet router with FIFO buffering, destination decoding, and parity error detection; verified for packet ordering, FIFO boundary conditions, and error-injection scenarios.
AMBA APB–AHB bridge in Verilog/SystemVerilog — address decoding, wait states, burst/handshake translation — verified with a layered UVM testbench using constrained-random stimulus, functional coverage, and assertions in ModelSim.
16-bit multi-cycle processor implementing a custom 8-instruction ISA with separate data and instruction memories; functional correctness verified with a ModelSim testbench.
Nanomaterial and nanodevice modeling with RESCU (DFT+DFPT) and NanoDcal (DFT+NEGF); quantum device modeling in QTCAD — Poisson–Schrödinger electrostatics, confinement, and transport.
Earlier work
QRNG exploiting superposition and entanglement; Qiskit circuits executed on IBM Quantum processors. Applied to image encryption and steganography with statistical randomness validation (NIST/Diehard).
Implemented QKD protocols BB84 and E91 with noisy-channel simulation and eavesdropping detection, analyzing unconditional security guarantees and practical implementation challenges.